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General Information
This page describes which
projects in the Computer Engineering Department of UFPE use Cadence
products in their development.
Cadence tools help students to obtain pratical experience in electronic
design with EDA software used in industry.
Click here to download the report for the usage of Cadence tools in the campus
Undergraduate courses at Computer Engineering
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Digital Integrated Circuits
Prototyping
CAD Tools. Project methodologies. Technology for implementation of
Digital Circuits. In this course Cadence tools are used for Digitial
IC verification.
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VLSI
Circuits Design
CMOS VLSI Design Course. In this course Cadence tools are used for
Digital IC design and verification.
Research
projects using Cadence
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MIPS IP core
the project aims to design an IP-core for the MIPS II processor. A instruction subset will be implemented considering a pipelined implementation of the processor.
MCBSP
In this project undergraduate students
are working in the development of an IP-core of a a multichannel
buffered serial port (Multichannel Buffered Serial
Port) (including a DMA controller), which is compliant
with the TMS320C6000 DSP from Texas Instruments McBSP.
They are included in the IP Core Controllers Peripherals
category and the main feature of these IP Cores is to allow the
connection of different external devices to a system or platform
composed of processors in signal processing applications.
The main features of the proposed IP-core are:
• full duplex communication;
• Registers with double buffering for continuous stream of data;
• Management independent clock and framing for transmission and
reception;
• Direct interface to industry-standard device such as codecs,
analog converters /
digital, analog interface devices, etc.
This IP-core can be used in several projects where it is necessary
to perform communication with external devices that have standard
interfaces such as:
• T1/E1 framers;
• Devices compatible with the ST-BUS bus STMicroelectronics via
mVIP;
• protocol compatible devices IIS;
• SPI Devices;
• Other.
In these research
projects Cadence tools are used for Digital IC design and
verification.
Disclaimers
Information is provided 'as
is' without warranty of any kind. No statement is made and no attempt
has been made to examine the information, either with respect to
operability, origin, authorship, or otherwise. Please use this
information at your own risk. We recommend using it on a copy of your
data to be sure you understand what it does under your conditions. Keep
your master intact until you are satisfied with the use of this
information within your environment.
Contact for this
web page
Juliana Andrade - jmaa@cin.ufpe.br
Cristiano Araujo -
cca2@cin.ufpe.br
last updated: April, 2014
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