Classic Timing Analyzer report for MIPS
Fri Oct 20 10:32:27 2017
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Parallel Compilation
  6. Clock Setup: 'Clk'
  7. tco
  8. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
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and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
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to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                   ;
+------------------------------+-------+---------------+----------------------------------+---------------------------+------------------------------+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time                      ; From                      ; To                           ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+----------------------------------+---------------------------+------------------------------+------------+----------+--------------+
; Worst-case tco               ; N/A   ; None          ; 27.701 ns                        ; Control:comb_281|state.JR ; WriteDataReg[0]              ; Clk        ; --       ; 0            ;
; Clock Setup: 'Clk'           ; N/A   ; None          ; 45.50 MHz ( period = 21.976 ns ) ; Control:comb_281|state.JR ; Banco_reg:Registers|Reg14[0] ; Clk        ; Clk      ; 0            ;
; Total number of failed paths ;       ;               ;                                  ;                           ;                              ;            ;          ; 0            ;
+------------------------------+-------+---------------+----------------------------------+---------------------------+------------------------------+------------+----------+--------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                                                            ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                                                               ; Setting            ; From ; To ; Entity Name ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                                                          ; EP2C70F896C6       ;      ;    ;             ;
; Timing Models                                                                                        ; Final              ;      ;    ;             ;
; Default hold multicycle                                                                              ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                                                            ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                                                               ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                                                       ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                                                     ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                                                                ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                                                              ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                                                     ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                                                 ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                                                        ; Off                ;      ;    ;             ;
; Minimum Core Junction Temperature                                                                    ; 0                  ;      ;    ;             ;
; Maximum Core Junction Temperature                                                                    ; 85                 ;      ;    ;             ;
; Number of source nodes to report per destination node                                                ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                                                                ; 10                 ;      ;    ;             ;
; Number of paths to report                                                                            ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                                                         ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                                                               ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                                                           ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                                                         ; On                 ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis                                       ; Off                ;      ;    ;             ;
; Reports worst-case timing paths for each clock domain and analysis                                   ; On                 ;      ;    ;             ;
; Specifies the maximum number of worst-case timing paths to report for each clock domain and analysis ; 100                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation                                  ; Off                ;      ;    ;             ;
; Output I/O Timing Endpoint                                                                           ; Near End           ;      ;    ;             ;
+------------------------------------------------------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clk             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 4           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 1           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     1 processor            ; 100.0%      ;
;     2-4 processors         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'Clk'                                                                                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------+-------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                         ; To                                  ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------+-------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 45.50 MHz ( period = 21.976 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.738 ns               ;
; N/A                                     ; 45.50 MHz ( period = 21.976 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.738 ns               ;
; N/A                                     ; 45.74 MHz ( period = 21.864 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.630 ns               ;
; N/A                                     ; 46.04 MHz ( period = 21.719 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.481 ns               ;
; N/A                                     ; 46.04 MHz ( period = 21.718 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.480 ns               ;
; N/A                                     ; 46.10 MHz ( period = 21.694 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.460 ns               ;
; N/A                                     ; 46.14 MHz ( period = 21.673 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.449 ns               ;
; N/A                                     ; 46.14 MHz ( period = 21.673 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.449 ns               ;
; N/A                                     ; 46.16 MHz ( period = 21.662 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.410 ns               ;
; N/A                                     ; 46.17 MHz ( period = 21.658 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.412 ns               ;
; N/A                                     ; 46.17 MHz ( period = 21.658 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.406 ns               ;
; N/A                                     ; 46.18 MHz ( period = 21.655 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.409 ns               ;
; N/A                                     ; 46.23 MHz ( period = 21.632 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.410 ns               ;
; N/A                                     ; 46.23 MHz ( period = 21.632 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.410 ns               ;
; N/A                                     ; 46.24 MHz ( period = 21.625 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.410 ns               ;
; N/A                                     ; 46.25 MHz ( period = 21.622 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.397 ns               ;
; N/A                                     ; 46.25 MHz ( period = 21.622 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.407 ns               ;
; N/A                                     ; 46.26 MHz ( period = 21.618 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.407 ns               ;
; N/A                                     ; 46.26 MHz ( period = 21.618 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.393 ns               ;
; N/A                                     ; 46.26 MHz ( period = 21.615 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.404 ns               ;
; N/A                                     ; 46.32 MHz ( period = 21.591 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.386 ns               ;
; N/A                                     ; 46.32 MHz ( period = 21.591 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.386 ns               ;
; N/A                                     ; 46.33 MHz ( period = 21.584 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.352 ns               ;
; N/A                                     ; 46.33 MHz ( period = 21.582 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg11[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.350 ns               ;
; N/A                                     ; 46.38 MHz ( period = 21.561 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.341 ns               ;
; N/A                                     ; 46.43 MHz ( period = 21.539 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.316 ns               ;
; N/A                                     ; 46.43 MHz ( period = 21.539 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.316 ns               ;
; N/A                                     ; 46.45 MHz ( period = 21.528 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.304 ns               ;
; N/A                                     ; 46.45 MHz ( period = 21.528 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.304 ns               ;
; N/A                                     ; 46.47 MHz ( period = 21.518 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.280 ns               ;
; N/A                                     ; 46.47 MHz ( period = 21.518 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.280 ns               ;
; N/A                                     ; 46.54 MHz ( period = 21.489 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.261 ns               ;
; N/A                                     ; 46.54 MHz ( period = 21.489 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.261 ns               ;
; N/A                                     ; 46.67 MHz ( period = 21.427 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.208 ns               ;
; N/A                                     ; 46.68 MHz ( period = 21.424 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg2[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.193 ns               ;
; N/A                                     ; 46.68 MHz ( period = 21.423 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg18[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.192 ns               ;
; N/A                                     ; 46.69 MHz ( period = 21.416 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.196 ns               ;
; N/A                                     ; 46.69 MHz ( period = 21.416 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.192 ns               ;
; N/A                                     ; 46.70 MHz ( period = 21.415 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.191 ns               ;
; N/A                                     ; 46.70 MHz ( period = 21.414 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg3[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.195 ns               ;
; N/A                                     ; 46.71 MHz ( period = 21.410 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg15[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.191 ns               ;
; N/A                                     ; 46.71 MHz ( period = 21.409 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.146 ns               ;
; N/A                                     ; 46.71 MHz ( period = 21.409 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.146 ns               ;
; N/A                                     ; 46.72 MHz ( period = 21.406 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.172 ns               ;
; N/A                                     ; 46.75 MHz ( period = 21.391 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.171 ns               ;
; N/A                                     ; 46.75 MHz ( period = 21.390 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.167 ns               ;
; N/A                                     ; 46.75 MHz ( period = 21.390 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.167 ns               ;
; N/A                                     ; 46.77 MHz ( period = 21.381 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.120 ns               ;
; N/A                                     ; 46.77 MHz ( period = 21.381 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.120 ns               ;
; N/A                                     ; 46.77 MHz ( period = 21.379 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.156 ns               ;
; N/A                                     ; 46.77 MHz ( period = 21.379 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.156 ns               ;
; N/A                                     ; 46.78 MHz ( period = 21.377 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.153 ns               ;
; N/A                                     ; 46.79 MHz ( period = 21.374 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg12[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.125 ns               ;
; N/A                                     ; 46.82 MHz ( period = 21.359 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.121 ns               ;
; N/A                                     ; 46.82 MHz ( period = 21.357 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg0[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.119 ns               ;
; N/A                                     ; 46.83 MHz ( period = 21.355 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.123 ns               ;
; N/A                                     ; 46.83 MHz ( period = 21.355 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.117 ns               ;
; N/A                                     ; 46.83 MHz ( period = 21.352 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.120 ns               ;
; N/A                                     ; 46.86 MHz ( period = 21.338 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg27[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.133 ns               ;
; N/A                                     ; 46.86 MHz ( period = 21.338 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg25[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.133 ns               ;
; N/A                                     ; 46.87 MHz ( period = 21.335 ns )                    ; Control:comb_281|state.SB_ADDRESS_COMP       ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.112 ns               ;
; N/A                                     ; 46.87 MHz ( period = 21.335 ns )                    ; Control:comb_281|state.SB_ADDRESS_COMP       ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.112 ns               ;
; N/A                                     ; 46.88 MHz ( period = 21.329 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.121 ns               ;
; N/A                                     ; 46.88 MHz ( period = 21.329 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.121 ns               ;
; N/A                                     ; 46.90 MHz ( period = 21.322 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.121 ns               ;
; N/A                                     ; 46.91 MHz ( period = 21.319 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.108 ns               ;
; N/A                                     ; 46.91 MHz ( period = 21.319 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.118 ns               ;
; N/A                                     ; 46.91 MHz ( period = 21.316 ns )                    ; Control:comb_281|state.ANDI                  ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.093 ns               ;
; N/A                                     ; 46.91 MHz ( period = 21.316 ns )                    ; Control:comb_281|state.ANDI                  ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.093 ns               ;
; N/A                                     ; 46.92 MHz ( period = 21.315 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.118 ns               ;
; N/A                                     ; 46.92 MHz ( period = 21.315 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.104 ns               ;
; N/A                                     ; 46.92 MHz ( period = 21.312 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.115 ns               ;
; N/A                                     ; 46.95 MHz ( period = 21.297 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.038 ns               ;
; N/A                                     ; 46.97 MHz ( period = 21.288 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.097 ns               ;
; N/A                                     ; 46.97 MHz ( period = 21.288 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.097 ns               ;
; N/A                                     ; 46.99 MHz ( period = 21.282 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.059 ns               ;
; N/A                                     ; 46.99 MHz ( period = 21.281 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.063 ns               ;
; N/A                                     ; 46.99 MHz ( period = 21.281 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.058 ns               ;
; N/A                                     ; 46.99 MHz ( period = 21.279 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg11[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.061 ns               ;
; N/A                                     ; 47.00 MHz ( period = 21.278 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.059 ns               ;
; N/A                                     ; 47.01 MHz ( period = 21.271 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.047 ns               ;
; N/A                                     ; 47.01 MHz ( period = 21.270 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.046 ns               ;
; N/A                                     ; 47.02 MHz ( period = 21.269 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.012 ns               ;
; N/A                                     ; 47.02 MHz ( period = 21.268 ns )                    ; Control:comb_281|state.SUBU                  ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.040 ns               ;
; N/A                                     ; 47.02 MHz ( period = 21.268 ns )                    ; Control:comb_281|state.SUBU                  ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.040 ns               ;
; N/A                                     ; 47.02 MHz ( period = 21.267 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.048 ns               ;
; N/A                                     ; 47.03 MHz ( period = 21.261 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.023 ns               ;
; N/A                                     ; 47.04 MHz ( period = 21.260 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.022 ns               ;
; N/A                                     ; 47.04 MHz ( period = 21.257 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.038 ns               ;
; N/A                                     ; 47.05 MHz ( period = 21.255 ns )                    ; Control:comb_281|state.JR                    ; Banco_reg:Registers|Reg28[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.006 ns               ;
; N/A                                     ; 47.06 MHz ( period = 21.251 ns )                    ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.013 ns               ;
; N/A                                     ; 47.06 MHz ( period = 21.251 ns )                    ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.013 ns               ;
; N/A                                     ; 47.07 MHz ( period = 21.246 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.026 ns               ;
; N/A                                     ; 47.08 MHz ( period = 21.240 ns )                    ; Control:comb_281|state.JAL_WR31              ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.002 ns               ;
; N/A                                     ; 47.08 MHz ( period = 21.240 ns )                    ; Control:comb_281|state.JAL_WR31              ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.002 ns               ;
; N/A                                     ; 47.09 MHz ( period = 21.237 ns )                    ; Control:comb_281|state.SLT                   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.013 ns               ;
; N/A                                     ; 47.09 MHz ( period = 21.237 ns )                    ; Control:comb_281|state.SLT                   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.013 ns               ;
; N/A                                     ; 47.09 MHz ( period = 21.236 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.002 ns               ;
; N/A                                     ; 47.10 MHz ( period = 21.232 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.004 ns               ;
; N/A                                     ; 47.10 MHz ( period = 21.231 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.003 ns               ;
; N/A                                     ; 47.11 MHz ( period = 21.225 ns )                    ; Control:comb_281|state.SXORI                 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.001 ns               ;
; N/A                                     ; 47.11 MHz ( period = 21.225 ns )                    ; Control:comb_281|state.SXORI                 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 21.001 ns               ;
; N/A                                     ; 47.11 MHz ( period = 21.225 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.988 ns               ;
; N/A                                     ; 47.12 MHz ( period = 21.223 ns )                    ; Control:comb_281|state.SB_ADDRESS_COMP       ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 21.004 ns               ;
; N/A                                     ; 47.12 MHz ( period = 21.221 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.990 ns               ;
; N/A                                     ; 47.12 MHz ( period = 21.221 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.984 ns               ;
; N/A                                     ; 47.13 MHz ( period = 21.218 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.987 ns               ;
; N/A                                     ; 47.14 MHz ( period = 21.214 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.976 ns               ;
; N/A                                     ; 47.15 MHz ( period = 21.210 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.978 ns               ;
; N/A                                     ; 47.15 MHz ( period = 21.210 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.972 ns               ;
; N/A                                     ; 47.15 MHz ( period = 21.207 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.975 ns               ;
; N/A                                     ; 47.15 MHz ( period = 21.207 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.983 ns               ;
; N/A                                     ; 47.16 MHz ( period = 21.204 ns )                    ; Control:comb_281|state.ANDI                  ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.985 ns               ;
; N/A                                     ; 47.16 MHz ( period = 21.204 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.954 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.948 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.198 ns )                    ; Control:comb_281|state.FETCH                 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.960 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.198 ns )                    ; Control:comb_281|state.FETCH                 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.960 ns               ;
; N/A                                     ; 47.18 MHz ( period = 21.197 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.951 ns               ;
; N/A                                     ; 47.18 MHz ( period = 21.195 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.988 ns               ;
; N/A                                     ; 47.18 MHz ( period = 21.195 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.988 ns               ;
; N/A                                     ; 47.20 MHz ( period = 21.188 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.988 ns               ;
; N/A                                     ; 47.20 MHz ( period = 21.185 ns )                    ; Control:comb_281|state.XOR                   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.961 ns               ;
; N/A                                     ; 47.20 MHz ( period = 21.185 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.975 ns               ;
; N/A                                     ; 47.20 MHz ( period = 21.185 ns )                    ; Control:comb_281|state.XOR                   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.961 ns               ;
; N/A                                     ; 47.20 MHz ( period = 21.185 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.985 ns               ;
; N/A                                     ; 47.21 MHz ( period = 21.184 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.976 ns               ;
; N/A                                     ; 47.21 MHz ( period = 21.184 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.976 ns               ;
; N/A                                     ; 47.21 MHz ( period = 21.181 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.985 ns               ;
; N/A                                     ; 47.21 MHz ( period = 21.181 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.971 ns               ;
; N/A                                     ; 47.22 MHz ( period = 21.178 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.982 ns               ;
; N/A                                     ; 47.22 MHz ( period = 21.177 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.976 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.175 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg4[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.933 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.174 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.963 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.174 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.174 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.973 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.174 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.171 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg26[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.935 ns               ;
; N/A                                     ; 47.23 MHz ( period = 21.171 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg20[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.929 ns               ;
; N/A                                     ; 47.24 MHz ( period = 21.170 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.973 ns               ;
; N/A                                     ; 47.24 MHz ( period = 21.170 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.959 ns               ;
; N/A                                     ; 47.24 MHz ( period = 21.168 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg24[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.932 ns               ;
; N/A                                     ; 47.24 MHz ( period = 21.167 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.970 ns               ;
; N/A                                     ; 47.24 MHz ( period = 21.167 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.25 MHz ( period = 21.164 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.939 ns               ;
; N/A                                     ; 47.25 MHz ( period = 21.164 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.949 ns               ;
; N/A                                     ; 47.26 MHz ( period = 21.160 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.949 ns               ;
; N/A                                     ; 47.26 MHz ( period = 21.160 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.935 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.157 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.946 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.156 ns )                    ; Control:comb_281|state.SUBU                  ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.932 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.154 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.964 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.154 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.964 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.153 ns )                    ; Control:comb_281|state.MULT0                 ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.905 ns               ;
; N/A                                     ; 47.27 MHz ( period = 21.153 ns )                    ; Control:comb_281|state.MULT0                 ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.905 ns               ;
; N/A                                     ; 47.28 MHz ( period = 21.152 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.889 ns               ;
; N/A                                     ; 47.28 MHz ( period = 21.151 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.888 ns               ;
; N/A                                     ; 47.29 MHz ( period = 21.147 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.930 ns               ;
; N/A                                     ; 47.29 MHz ( period = 21.145 ns )                    ; Control:comb_281|state.ADDIU                 ; Banco_reg:Registers|Reg11[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.928 ns               ;
; N/A                                     ; 47.29 MHz ( period = 21.145 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg5[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.933 ns               ;
; N/A                                     ; 47.29 MHz ( period = 21.145 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg1[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.933 ns               ;
; N/A                                     ; 47.30 MHz ( period = 21.143 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.30 MHz ( period = 21.143 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.952 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.139 ns )                    ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.905 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.138 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg23[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.933 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.136 ns )                    ; Control:comb_281|state.JR                    ; Registrador:ProgramCounter|Saida[1] ; Clk        ; Clk      ; None                        ; None                      ; 20.906 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.136 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.918 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.135 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg8[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.920 ns               ;
; N/A                                     ; 47.31 MHz ( period = 21.135 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg21[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.930 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.134 ns )                    ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Banco_reg:Registers|Reg11[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.916 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.133 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.928 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.133 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.928 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.133 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.910 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.132 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.909 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.131 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg29[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.930 ns               ;
; N/A                                     ; 47.32 MHz ( period = 21.131 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg16[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.916 ns               ;
; N/A                                     ; 47.33 MHz ( period = 21.130 ns )                    ; Control:comb_281|state.BNE                   ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.869 ns               ;
; N/A                                     ; 47.33 MHz ( period = 21.130 ns )                    ; Control:comb_281|state.BNE                   ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.869 ns               ;
; N/A                                     ; 47.33 MHz ( period = 21.128 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg31[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.927 ns               ;
; N/A                                     ; 47.33 MHz ( period = 21.128 ns )                    ; Control:comb_281|state.JAL_WR31              ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.894 ns               ;
; N/A                                     ; 47.33 MHz ( period = 21.127 ns )                    ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.868 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.126 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.894 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.125 ns )                    ; Control:comb_281|state.SLT                   ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.905 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.124 ns )                    ; Control:comb_281|state.J                     ; Banco_reg:Registers|Reg11[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.892 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.124 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.863 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.123 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.862 ns               ;
; N/A                                     ; 47.34 MHz ( period = 21.122 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg17[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.899 ns               ;
; N/A                                     ; 47.35 MHz ( period = 21.121 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg2[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.904 ns               ;
; N/A                                     ; 47.35 MHz ( period = 21.121 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg19[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.898 ns               ;
; N/A                                     ; 47.35 MHz ( period = 21.120 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg18[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.903 ns               ;
; N/A                                     ; 47.36 MHz ( period = 21.113 ns )                    ; Control:comb_281|state.SXORI                 ; Banco_reg:Registers|Reg9[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.893 ns               ;
; N/A                                     ; 47.37 MHz ( period = 21.111 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg3[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.906 ns               ;
; N/A                                     ; 47.37 MHz ( period = 21.110 ns )                    ; Control:comb_281|state.SH_ADDRESS_COMP       ; Banco_reg:Registers|Reg22[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.887 ns               ;
; N/A                                     ; 47.37 MHz ( period = 21.110 ns )                    ; Control:comb_281|state.SH_ADDRESS_COMP       ; Banco_reg:Registers|Reg14[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.887 ns               ;
; N/A                                     ; 47.38 MHz ( period = 21.108 ns )                    ; Control:comb_281|state.SLTI                  ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.889 ns               ;
; N/A                                     ; 47.38 MHz ( period = 21.107 ns )                    ; Control:comb_281|state.DECODE                ; Banco_reg:Registers|Reg15[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.902 ns               ;
; N/A                                     ; 47.38 MHz ( period = 21.104 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg30[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.909 ns               ;
; N/A                                     ; 47.38 MHz ( period = 21.104 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg6[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.909 ns               ;
; N/A                                     ; 47.40 MHz ( period = 21.099 ns )                    ; Control:comb_281|state.BEQ                   ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.842 ns               ;
; N/A                                     ; 47.40 MHz ( period = 21.097 ns )                    ; Control:comb_281|state.ADD                   ; Banco_reg:Registers|Reg13[0]        ; Clk        ; Clk      ; None                        ; None                      ; 20.875 ns               ;
; N/A                                     ; 47.40 MHz ( period = 21.097 ns )                    ; Control:comb_281|state.LBU_1                 ; Banco_reg:Registers|Reg7[0]         ; Clk        ; Clk      ; None                        ; None                      ; 20.878 ns               ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                              ;                                     ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------+-------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                                                      ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------+-----------------+------------+
; Slack                                   ; Required tco                                        ; Actual tco ; From                                         ; To              ; From Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------+-----------------+------------+
; N/A                                     ; None                                                ; 27.701 ns  ; Control:comb_281|state.JR                    ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.404 ns  ; Control:comb_281|state.JR                    ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 27.398 ns  ; Control:comb_281|state.DECODE                ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.264 ns  ; Control:comb_281|state.ADDIU                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.253 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.243 ns  ; Control:comb_281|state.J                     ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.214 ns  ; Control:comb_281|state.ADD                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.134 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.115 ns  ; Control:comb_281|state.SLTI                  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.106 ns  ; Control:comb_281|state.BEQ                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.104 ns  ; Control:comb_281|state.LBU_1                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.101 ns  ; Control:comb_281|state.DECODE                ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 27.060 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 27.041 ns  ; Control:comb_281|state.ANDI                  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.993 ns  ; Control:comb_281|state.SUBU                  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.976 ns  ; Control:comb_281|state.TREATING_OVERFLOW_1   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.967 ns  ; Control:comb_281|state.ADDIU                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.965 ns  ; Control:comb_281|state.JAL_WR31              ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.962 ns  ; Control:comb_281|state.SLT                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.956 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.950 ns  ; Control:comb_281|state.SXORI                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.946 ns  ; Control:comb_281|state.J                     ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.923 ns  ; Control:comb_281|state.FETCH                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.917 ns  ; Control:comb_281|state.ADD                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.910 ns  ; Control:comb_281|state.XOR                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.878 ns  ; Control:comb_281|state.MULT0                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.855 ns  ; Control:comb_281|state.BNE                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.837 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.835 ns  ; Control:comb_281|state.SH_ADDRESS_COMP       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.818 ns  ; Control:comb_281|state.SLTI                  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.809 ns  ; Control:comb_281|state.BEQ                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.807 ns  ; Control:comb_281|state.LBU_1                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.804 ns  ; Control:comb_281|state.LW_ADDRESS_COMP       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.769 ns  ; Control:comb_281|state.MULT1                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.763 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.744 ns  ; Control:comb_281|state.ANDI                  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.719 ns  ; Control:comb_281|state.AND                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.696 ns  ; Control:comb_281|state.SUBU                  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.689 ns  ; Control:comb_281|state.LHU_1                 ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.679 ns  ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.668 ns  ; Control:comb_281|state.JAL_WR31              ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.668 ns  ; Control:comb_281|state.SW_ADDRESS_COMP       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.665 ns  ; Control:comb_281|state.SLT                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.657 ns  ; Control:comb_281|state.JR                    ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.653 ns  ; Control:comb_281|state.SXORI                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.626 ns  ; Control:comb_281|state.FETCH                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.613 ns  ; Control:comb_281|state.XOR                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.581 ns  ; Control:comb_281|state.MULT0                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.558 ns  ; Control:comb_281|state.BNE                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.554 ns  ; Control:comb_281|state.FETCH_MEM_DELAY1      ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.538 ns  ; Control:comb_281|state.SH_ADDRESS_COMP       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.507 ns  ; Control:comb_281|state.LW_ADDRESS_COMP       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.472 ns  ; Control:comb_281|state.MULT1                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.445 ns  ; Control:comb_281|state.JR                    ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 26.422 ns  ; Control:comb_281|state.AND                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.392 ns  ; Control:comb_281|state.LHU_1                 ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.371 ns  ; Control:comb_281|state.SW_ADDRESS_COMP       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.354 ns  ; Control:comb_281|state.DECODE                ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.351 ns  ; Control:comb_281|state.ADDU                  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.325 ns  ; Control:comb_281|state.ADDI                  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.262 ns  ; Registrador:B|Saida[0]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.257 ns  ; Control:comb_281|state.FETCH_MEM_DELAY1      ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.220 ns  ; Control:comb_281|state.ADDIU                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.209 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.199 ns  ; Control:comb_281|state.J                     ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.170 ns  ; Control:comb_281|state.ADD                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.170 ns  ; Control:comb_281|state.SUB                   ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.145 ns  ; Control:comb_281|state.JAL_COMP              ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.142 ns  ; Control:comb_281|state.DECODE                ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 26.094 ns  ; Registrador:A|Saida[0]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 26.090 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.071 ns  ; Control:comb_281|state.SLTI                  ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.062 ns  ; Control:comb_281|state.BEQ                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.060 ns  ; Control:comb_281|state.LBU_1                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.054 ns  ; Control:comb_281|state.ADDU                  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.028 ns  ; Control:comb_281|state.ADDI                  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 26.016 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 26.008 ns  ; Control:comb_281|state.ADDIU                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.997 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.997 ns  ; Control:comb_281|state.ANDI                  ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.987 ns  ; Control:comb_281|state.J                     ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.965 ns  ; Registrador:B|Saida[0]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.958 ns  ; Control:comb_281|state.ADD                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.949 ns  ; Control:comb_281|state.SUBU                  ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.932 ns  ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.921 ns  ; Control:comb_281|state.JAL_WR31              ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.918 ns  ; Control:comb_281|state.SLT                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.906 ns  ; Control:comb_281|state.SXORI                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.879 ns  ; Control:comb_281|state.FETCH                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.878 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.873 ns  ; Control:comb_281|state.SUB                   ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.866 ns  ; Control:comb_281|state.XOR                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.861 ns  ; Registrador:ProgramCounter|Saida[0]          ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.859 ns  ; Control:comb_281|state.SLTI                  ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.850 ns  ; Control:comb_281|state.BEQ                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.848 ns  ; Control:comb_281|state.LBU_1                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.848 ns  ; Control:comb_281|state.JAL_COMP              ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.834 ns  ; Control:comb_281|state.MULT0                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.811 ns  ; Control:comb_281|state.BNE                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.804 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.797 ns  ; Registrador:A|Saida[0]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.791 ns  ; Control:comb_281|state.SH_ADDRESS_COMP       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.785 ns  ; Control:comb_281|state.ANDI                  ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.760 ns  ; Control:comb_281|state.LW_ADDRESS_COMP       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.737 ns  ; Control:comb_281|state.SUBU                  ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.725 ns  ; Control:comb_281|state.MULT1                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.720 ns  ; Control:comb_281|state.TREATING_OVERFLOW_1   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.709 ns  ; Control:comb_281|state.JAL_WR31              ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.706 ns  ; Control:comb_281|state.SLT                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.694 ns  ; Control:comb_281|state.SXORI                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.675 ns  ; Control:comb_281|state.AND                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.667 ns  ; Control:comb_281|state.FETCH                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.654 ns  ; Control:comb_281|state.XOR                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.654 ns  ; Registrador:B|Saida[5]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.645 ns  ; Control:comb_281|state.LHU_1                 ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.624 ns  ; Control:comb_281|state.SW_ADDRESS_COMP       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.622 ns  ; Control:comb_281|state.MULT0                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.615 ns  ; Registrador:ProgramCounter|Saida[1]          ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.599 ns  ; Control:comb_281|state.BNE                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.579 ns  ; Control:comb_281|state.SH_ADDRESS_COMP       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.564 ns  ; Registrador:ProgramCounter|Saida[0]          ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.548 ns  ; Control:comb_281|state.LW_ADDRESS_COMP       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.513 ns  ; Control:comb_281|state.MULT1                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.510 ns  ; Control:comb_281|state.FETCH_MEM_DELAY1      ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.463 ns  ; Control:comb_281|state.AND                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.433 ns  ; Control:comb_281|state.LHU_1                 ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.419 ns  ; Registrador:B|Saida[1]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.412 ns  ; Control:comb_281|state.SW_ADDRESS_COMP       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.396 ns  ; Instr_Reg:Instruction_Register|Instr15_0[1]  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.357 ns  ; Registrador:B|Saida[5]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.338 ns  ; Registrador:ProgramCounter|Saida[3]          ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.318 ns  ; Registrador:ProgramCounter|Saida[1]          ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.317 ns  ; Instr_Reg:Instruction_Register|Instr15_0[0]  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.307 ns  ; Control:comb_281|state.ADDU                  ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.298 ns  ; Control:comb_281|state.FETCH_MEM_DELAY1      ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.288 ns  ; Control:comb_281|state.JR                    ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 25.281 ns  ; Control:comb_281|state.ADDI                  ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.266 ns  ; Control:comb_281|state.JR                    ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 25.234 ns  ; Registrador:B|Saida[3]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.223 ns  ; Control:comb_281|state.JR                    ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 25.218 ns  ; Registrador:B|Saida[0]                       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.126 ns  ; Control:comb_281|state.SUB                   ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.124 ns  ; Registrador:A|Saida[1]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.122 ns  ; Registrador:B|Saida[1]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.101 ns  ; Control:comb_281|state.JAL_COMP              ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.099 ns  ; Instr_Reg:Instruction_Register|Instr15_0[1]  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.095 ns  ; Control:comb_281|state.ADDU                  ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.071 ns  ; Registrador:ProgramCounter|Saida[2]          ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.069 ns  ; Control:comb_281|state.ADDI                  ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 25.059 ns  ; Instr_Reg:Instruction_Register|Instr15_0[3]  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 25.050 ns  ; Registrador:A|Saida[0]                       ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 25.041 ns  ; Registrador:ProgramCounter|Saida[3]          ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.020 ns  ; Instr_Reg:Instruction_Register|Instr15_0[0]  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 25.006 ns  ; Registrador:B|Saida[0]                       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 24.985 ns  ; Control:comb_281|state.DECODE                ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.973 ns  ; Registrador:A|Saida[2]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 24.963 ns  ; Control:comb_281|state.DECODE                ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.948 ns  ; Control:comb_281|state.JR                    ; Alu[21]         ; Clk        ;
; N/A                                     ; None                                                ; 24.937 ns  ; Registrador:B|Saida[3]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 24.920 ns  ; Control:comb_281|state.DECODE                ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.914 ns  ; Control:comb_281|state.SUB                   ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 24.894 ns  ; Registrador:B|Saida[2]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 24.889 ns  ; Control:comb_281|state.JAL_COMP              ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 24.851 ns  ; Control:comb_281|state.ADDIU                 ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.851 ns  ; Registrador:A|Saida[4]                       ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 24.840 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.838 ns  ; Registrador:A|Saida[0]                       ; Alu[31]         ; Clk        ;
; N/A                                     ; None                                                ; 24.830 ns  ; Control:comb_281|state.J                     ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.829 ns  ; Control:comb_281|state.ADDIU                 ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.829 ns  ; Instr_Reg:Instruction_Register|Instr15_0[2]  ; WriteDataReg[0] ; Clk        ;
; N/A                                     ; None                                                ; 24.827 ns  ; Registrador:A|Saida[1]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 24.818 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.817 ns  ; Registrador:ProgramCounter|Saida[0]          ; Alu[30]         ; Clk        ;
; N/A                                     ; None                                                ; 24.808 ns  ; Control:comb_281|state.J                     ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.801 ns  ; Control:comb_281|state.ADD                   ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.786 ns  ; Control:comb_281|state.ADDIU                 ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.779 ns  ; Control:comb_281|state.ADD                   ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.775 ns  ; Control:comb_281|state.FETCH_MEM_DELAY2      ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.774 ns  ; Registrador:ProgramCounter|Saida[2]          ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 24.765 ns  ; Control:comb_281|state.J                     ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.762 ns  ; Instr_Reg:Instruction_Register|Instr15_0[3]  ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 24.750 ns  ; Control:comb_281|state.JR                    ; Alu[28]         ; Clk        ;
; N/A                                     ; None                                                ; 24.736 ns  ; Control:comb_281|state.ADD                   ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.721 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.702 ns  ; Control:comb_281|state.SLTI                  ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.699 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.693 ns  ; Control:comb_281|state.BEQ                   ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.691 ns  ; Control:comb_281|state.LBU_1                 ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.680 ns  ; Control:comb_281|state.SLTI                  ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.676 ns  ; Registrador:A|Saida[2]                       ; Alu[29]         ; Clk        ;
; N/A                                     ; None                                                ; 24.671 ns  ; Control:comb_281|state.BEQ                   ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.669 ns  ; Control:comb_281|state.LBU_1                 ; Alu[23]         ; Clk        ;
; N/A                                     ; None                                                ; 24.656 ns  ; Control:comb_281|state.TREATING_INVALID_OP_1 ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.647 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.645 ns  ; Control:comb_281|state.DECODE                ; Alu[21]         ; Clk        ;
; N/A                                     ; None                                                ; 24.637 ns  ; Control:comb_281|state.SLTI                  ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.628 ns  ; Control:comb_281|state.BEQ                   ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.628 ns  ; Control:comb_281|state.ANDI                  ; Alu[25]         ; Clk        ;
; N/A                                     ; None                                                ; 24.626 ns  ; Control:comb_281|state.LBU_1                 ; Alu[27]         ; Clk        ;
; N/A                                     ; None                                                ; 24.625 ns  ; Control:comb_281|state.SB_ADDRESS_COMP       ; Alu[23]         ; Clk        ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;                                              ;                 ;            ;
+-----------------------------------------+-----------------------------------------------------+------------+----------------------------------------------+-----------------+------------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
    Info: Processing started: Fri Oct 20 10:32:26 2017
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off MIPS -c MIPS --timing_analysis_only
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "Clk" is an undefined clock
Info: Clock "Clk" has Internal fmax of 45.5 MHz between source register "Control:comb_281|state.JR" and destination register "Banco_reg:Registers|Reg22[0]" (period= 21.976 ns)
    Info: + Longest register to register delay is 21.738 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X58_Y37_N3; Fanout = 9; REG Node = 'Control:comb_281|state.JR'
        Info: 2: + IC(0.769 ns) + CELL(0.438 ns) = 1.207 ns; Loc. = LCCOMB_X58_Y37_N26; Fanout = 1; COMB Node = 'Control:comb_281|WideOr35~0'
        Info: 3: + IC(0.252 ns) + CELL(0.420 ns) = 1.879 ns; Loc. = LCCOMB_X58_Y37_N24; Fanout = 54; COMB Node = 'Control:comb_281|WideOr35~1'
        Info: 4: + IC(1.008 ns) + CELL(0.150 ns) = 3.037 ns; Loc. = LCCOMB_X59_Y38_N12; Fanout = 5; COMB Node = 'Mux32bits_4x2:RHS_Mux|Mux30~0'
        Info: 5: + IC(0.466 ns) + CELL(0.275 ns) = 3.778 ns; Loc. = LCCOMB_X58_Y38_N20; Fanout = 2; COMB Node = 'ALS:ALU|Ula32:ALU|Mux62~0'
        Info: 6: + IC(0.279 ns) + CELL(0.438 ns) = 4.495 ns; Loc. = LCCOMB_X58_Y38_N0; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[1]~14'
        Info: 7: + IC(0.252 ns) + CELL(0.150 ns) = 4.897 ns; Loc. = LCCOMB_X58_Y38_N30; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[3]~15'
        Info: 8: + IC(0.246 ns) + CELL(0.150 ns) = 5.293 ns; Loc. = LCCOMB_X58_Y38_N26; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[3]~16'
        Info: 9: + IC(0.255 ns) + CELL(0.150 ns) = 5.698 ns; Loc. = LCCOMB_X58_Y38_N10; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[5]~17'
        Info: 10: + IC(0.249 ns) + CELL(0.150 ns) = 6.097 ns; Loc. = LCCOMB_X58_Y38_N18; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[5]~18'
        Info: 11: + IC(0.270 ns) + CELL(0.150 ns) = 6.517 ns; Loc. = LCCOMB_X58_Y38_N28; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[7]~19'
        Info: 12: + IC(0.248 ns) + CELL(0.150 ns) = 6.915 ns; Loc. = LCCOMB_X58_Y38_N6; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[7]~20'
        Info: 13: + IC(0.748 ns) + CELL(0.150 ns) = 7.813 ns; Loc. = LCCOMB_X59_Y35_N0; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[9]~21'
        Info: 14: + IC(0.250 ns) + CELL(0.150 ns) = 8.213 ns; Loc. = LCCOMB_X59_Y35_N18; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[9]~22'
        Info: 15: + IC(0.256 ns) + CELL(0.150 ns) = 8.619 ns; Loc. = LCCOMB_X59_Y35_N4; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[11]~23'
        Info: 16: + IC(0.253 ns) + CELL(0.271 ns) = 9.143 ns; Loc. = LCCOMB_X59_Y35_N22; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[11]~24'
        Info: 17: + IC(0.255 ns) + CELL(0.150 ns) = 9.548 ns; Loc. = LCCOMB_X59_Y35_N8; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[13]~25'
        Info: 18: + IC(0.251 ns) + CELL(0.271 ns) = 10.070 ns; Loc. = LCCOMB_X59_Y35_N10; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[13]~26'
        Info: 19: + IC(0.272 ns) + CELL(0.150 ns) = 10.492 ns; Loc. = LCCOMB_X59_Y35_N20; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[15]~27'
        Info: 20: + IC(0.254 ns) + CELL(0.271 ns) = 11.017 ns; Loc. = LCCOMB_X59_Y35_N6; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[15]~28'
        Info: 21: + IC(0.264 ns) + CELL(0.150 ns) = 11.431 ns; Loc. = LCCOMB_X59_Y35_N16; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[17]~29'
        Info: 22: + IC(0.252 ns) + CELL(0.271 ns) = 11.954 ns; Loc. = LCCOMB_X59_Y35_N26; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[17]~40'
        Info: 23: + IC(0.251 ns) + CELL(0.150 ns) = 12.355 ns; Loc. = LCCOMB_X59_Y35_N2; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[19]~30'
        Info: 24: + IC(0.249 ns) + CELL(0.150 ns) = 12.754 ns; Loc. = LCCOMB_X59_Y35_N28; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[19]~41'
        Info: 25: + IC(0.258 ns) + CELL(0.150 ns) = 13.162 ns; Loc. = LCCOMB_X59_Y35_N12; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[21]~31'
        Info: 26: + IC(0.254 ns) + CELL(0.150 ns) = 13.566 ns; Loc. = LCCOMB_X59_Y35_N30; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[21]~42'
        Info: 27: + IC(0.412 ns) + CELL(0.150 ns) = 14.128 ns; Loc. = LCCOMB_X58_Y35_N0; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[23]~32'
        Info: 28: + IC(0.250 ns) + CELL(0.150 ns) = 14.528 ns; Loc. = LCCOMB_X58_Y35_N28; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[23]~43'
        Info: 29: + IC(0.255 ns) + CELL(0.150 ns) = 14.933 ns; Loc. = LCCOMB_X58_Y35_N26; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[25]~33'
        Info: 30: + IC(0.250 ns) + CELL(0.150 ns) = 15.333 ns; Loc. = LCCOMB_X58_Y35_N22; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[25]~44'
        Info: 31: + IC(0.254 ns) + CELL(0.150 ns) = 15.737 ns; Loc. = LCCOMB_X58_Y35_N12; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[27]~34'
        Info: 32: + IC(0.244 ns) + CELL(0.150 ns) = 16.131 ns; Loc. = LCCOMB_X58_Y35_N16; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[27]~45'
        Info: 33: + IC(0.264 ns) + CELL(0.275 ns) = 16.670 ns; Loc. = LCCOMB_X58_Y35_N30; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[29]~35'
        Info: 34: + IC(0.417 ns) + CELL(0.150 ns) = 17.237 ns; Loc. = LCCOMB_X57_Y35_N2; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[29]~36'
        Info: 35: + IC(0.260 ns) + CELL(0.150 ns) = 17.647 ns; Loc. = LCCOMB_X57_Y35_N22; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[31]~38'
        Info: 36: + IC(0.731 ns) + CELL(0.150 ns) = 18.528 ns; Loc. = LCCOMB_X56_Y37_N28; Fanout = 4; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[31]~39'
        Info: 37: + IC(0.945 ns) + CELL(0.150 ns) = 19.623 ns; Loc. = LCCOMB_X51_Y37_N0; Fanout = 1; COMB Node = 'Mux32bit_8x1:WriteDataMux|Mux31~5'
        Info: 38: + IC(0.245 ns) + CELL(0.150 ns) = 20.018 ns; Loc. = LCCOMB_X51_Y37_N2; Fanout = 33; COMB Node = 'Mux32bit_8x1:WriteDataMux|Mux31~6'
        Info: 39: + IC(1.354 ns) + CELL(0.366 ns) = 21.738 ns; Loc. = LCFF_X50_Y37_N25; Fanout = 2; REG Node = 'Banco_reg:Registers|Reg22[0]'
        Info: Total cell delay = 7.496 ns ( 34.48 % )
        Info: Total interconnect delay = 14.242 ns ( 65.52 % )
    Info: - Smallest clock skew is -0.024 ns
        Info: + Shortest clock path from clock "Clk" to destination register is 2.800 ns
            Info: 1: + IC(0.000 ns) + CELL(0.989 ns) = 0.989 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'Clk'
            Info: 2: + IC(0.114 ns) + CELL(0.000 ns) = 1.103 ns; Loc. = CLKCTRL_G3; Fanout = 1726; COMB Node = 'Clk~clkctrl'
            Info: 3: + IC(1.160 ns) + CELL(0.537 ns) = 2.800 ns; Loc. = LCFF_X50_Y37_N25; Fanout = 2; REG Node = 'Banco_reg:Registers|Reg22[0]'
            Info: Total cell delay = 1.526 ns ( 54.50 % )
            Info: Total interconnect delay = 1.274 ns ( 45.50 % )
        Info: - Longest clock path from clock "Clk" to source register is 2.824 ns
            Info: 1: + IC(0.000 ns) + CELL(0.989 ns) = 0.989 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'Clk'
            Info: 2: + IC(0.114 ns) + CELL(0.000 ns) = 1.103 ns; Loc. = CLKCTRL_G3; Fanout = 1726; COMB Node = 'Clk~clkctrl'
            Info: 3: + IC(1.184 ns) + CELL(0.537 ns) = 2.824 ns; Loc. = LCFF_X58_Y37_N3; Fanout = 9; REG Node = 'Control:comb_281|state.JR'
            Info: Total cell delay = 1.526 ns ( 54.04 % )
            Info: Total interconnect delay = 1.298 ns ( 45.96 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Micro setup delay of destination is -0.036 ns
Info: tco from clock "Clk" to destination pin "WriteDataReg[0]" through register "Control:comb_281|state.JR" is 27.701 ns
    Info: + Longest clock path from clock "Clk" to source register is 2.824 ns
        Info: 1: + IC(0.000 ns) + CELL(0.989 ns) = 0.989 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'Clk'
        Info: 2: + IC(0.114 ns) + CELL(0.000 ns) = 1.103 ns; Loc. = CLKCTRL_G3; Fanout = 1726; COMB Node = 'Clk~clkctrl'
        Info: 3: + IC(1.184 ns) + CELL(0.537 ns) = 2.824 ns; Loc. = LCFF_X58_Y37_N3; Fanout = 9; REG Node = 'Control:comb_281|state.JR'
        Info: Total cell delay = 1.526 ns ( 54.04 % )
        Info: Total interconnect delay = 1.298 ns ( 45.96 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Longest register to pin delay is 24.627 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X58_Y37_N3; Fanout = 9; REG Node = 'Control:comb_281|state.JR'
        Info: 2: + IC(0.769 ns) + CELL(0.438 ns) = 1.207 ns; Loc. = LCCOMB_X58_Y37_N26; Fanout = 1; COMB Node = 'Control:comb_281|WideOr35~0'
        Info: 3: + IC(0.252 ns) + CELL(0.420 ns) = 1.879 ns; Loc. = LCCOMB_X58_Y37_N24; Fanout = 54; COMB Node = 'Control:comb_281|WideOr35~1'
        Info: 4: + IC(1.008 ns) + CELL(0.150 ns) = 3.037 ns; Loc. = LCCOMB_X59_Y38_N12; Fanout = 5; COMB Node = 'Mux32bits_4x2:RHS_Mux|Mux30~0'
        Info: 5: + IC(0.466 ns) + CELL(0.275 ns) = 3.778 ns; Loc. = LCCOMB_X58_Y38_N20; Fanout = 2; COMB Node = 'ALS:ALU|Ula32:ALU|Mux62~0'
        Info: 6: + IC(0.279 ns) + CELL(0.438 ns) = 4.495 ns; Loc. = LCCOMB_X58_Y38_N0; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[1]~14'
        Info: 7: + IC(0.252 ns) + CELL(0.150 ns) = 4.897 ns; Loc. = LCCOMB_X58_Y38_N30; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[3]~15'
        Info: 8: + IC(0.246 ns) + CELL(0.150 ns) = 5.293 ns; Loc. = LCCOMB_X58_Y38_N26; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[3]~16'
        Info: 9: + IC(0.255 ns) + CELL(0.150 ns) = 5.698 ns; Loc. = LCCOMB_X58_Y38_N10; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[5]~17'
        Info: 10: + IC(0.249 ns) + CELL(0.150 ns) = 6.097 ns; Loc. = LCCOMB_X58_Y38_N18; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[5]~18'
        Info: 11: + IC(0.270 ns) + CELL(0.150 ns) = 6.517 ns; Loc. = LCCOMB_X58_Y38_N28; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[7]~19'
        Info: 12: + IC(0.248 ns) + CELL(0.150 ns) = 6.915 ns; Loc. = LCCOMB_X58_Y38_N6; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[7]~20'
        Info: 13: + IC(0.748 ns) + CELL(0.150 ns) = 7.813 ns; Loc. = LCCOMB_X59_Y35_N0; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[9]~21'
        Info: 14: + IC(0.250 ns) + CELL(0.150 ns) = 8.213 ns; Loc. = LCCOMB_X59_Y35_N18; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[9]~22'
        Info: 15: + IC(0.256 ns) + CELL(0.150 ns) = 8.619 ns; Loc. = LCCOMB_X59_Y35_N4; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[11]~23'
        Info: 16: + IC(0.253 ns) + CELL(0.271 ns) = 9.143 ns; Loc. = LCCOMB_X59_Y35_N22; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[11]~24'
        Info: 17: + IC(0.255 ns) + CELL(0.150 ns) = 9.548 ns; Loc. = LCCOMB_X59_Y35_N8; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[13]~25'
        Info: 18: + IC(0.251 ns) + CELL(0.271 ns) = 10.070 ns; Loc. = LCCOMB_X59_Y35_N10; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[13]~26'
        Info: 19: + IC(0.272 ns) + CELL(0.150 ns) = 10.492 ns; Loc. = LCCOMB_X59_Y35_N20; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[15]~27'
        Info: 20: + IC(0.254 ns) + CELL(0.271 ns) = 11.017 ns; Loc. = LCCOMB_X59_Y35_N6; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[15]~28'
        Info: 21: + IC(0.264 ns) + CELL(0.150 ns) = 11.431 ns; Loc. = LCCOMB_X59_Y35_N16; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[17]~29'
        Info: 22: + IC(0.252 ns) + CELL(0.271 ns) = 11.954 ns; Loc. = LCCOMB_X59_Y35_N26; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[17]~40'
        Info: 23: + IC(0.251 ns) + CELL(0.150 ns) = 12.355 ns; Loc. = LCCOMB_X59_Y35_N2; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[19]~30'
        Info: 24: + IC(0.249 ns) + CELL(0.150 ns) = 12.754 ns; Loc. = LCCOMB_X59_Y35_N28; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[19]~41'
        Info: 25: + IC(0.258 ns) + CELL(0.150 ns) = 13.162 ns; Loc. = LCCOMB_X59_Y35_N12; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[21]~31'
        Info: 26: + IC(0.254 ns) + CELL(0.150 ns) = 13.566 ns; Loc. = LCCOMB_X59_Y35_N30; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[21]~42'
        Info: 27: + IC(0.412 ns) + CELL(0.150 ns) = 14.128 ns; Loc. = LCCOMB_X58_Y35_N0; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[23]~32'
        Info: 28: + IC(0.250 ns) + CELL(0.150 ns) = 14.528 ns; Loc. = LCCOMB_X58_Y35_N28; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[23]~43'
        Info: 29: + IC(0.255 ns) + CELL(0.150 ns) = 14.933 ns; Loc. = LCCOMB_X58_Y35_N26; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[25]~33'
        Info: 30: + IC(0.250 ns) + CELL(0.150 ns) = 15.333 ns; Loc. = LCCOMB_X58_Y35_N22; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[25]~44'
        Info: 31: + IC(0.254 ns) + CELL(0.150 ns) = 15.737 ns; Loc. = LCCOMB_X58_Y35_N12; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[27]~34'
        Info: 32: + IC(0.244 ns) + CELL(0.150 ns) = 16.131 ns; Loc. = LCCOMB_X58_Y35_N16; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[27]~45'
        Info: 33: + IC(0.264 ns) + CELL(0.275 ns) = 16.670 ns; Loc. = LCCOMB_X58_Y35_N30; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[29]~35'
        Info: 34: + IC(0.417 ns) + CELL(0.150 ns) = 17.237 ns; Loc. = LCCOMB_X57_Y35_N2; Fanout = 3; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[29]~36'
        Info: 35: + IC(0.260 ns) + CELL(0.150 ns) = 17.647 ns; Loc. = LCCOMB_X57_Y35_N22; Fanout = 1; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[31]~38'
        Info: 36: + IC(0.731 ns) + CELL(0.150 ns) = 18.528 ns; Loc. = LCCOMB_X56_Y37_N28; Fanout = 4; COMB Node = 'ALS:ALU|Ula32:ALU|carry_temp[31]~39'
        Info: 37: + IC(0.945 ns) + CELL(0.150 ns) = 19.623 ns; Loc. = LCCOMB_X51_Y37_N0; Fanout = 1; COMB Node = 'Mux32bit_8x1:WriteDataMux|Mux31~5'
        Info: 38: + IC(0.245 ns) + CELL(0.150 ns) = 20.018 ns; Loc. = LCCOMB_X51_Y37_N2; Fanout = 33; COMB Node = 'Mux32bit_8x1:WriteDataMux|Mux31~6'
        Info: 39: + IC(1.851 ns) + CELL(2.758 ns) = 24.627 ns; Loc. = PIN_H16; Fanout = 0; PIN Node = 'WriteDataReg[0]'
        Info: Total cell delay = 9.888 ns ( 40.15 % )
        Info: Total interconnect delay = 14.739 ns ( 59.85 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning
    Info: Peak virtual memory: 211 megabytes
    Info: Processing ended: Fri Oct 20 10:32:27 2017
    Info: Elapsed time: 00:00:01
    Info: Total CPU time (on all processors): 00:00:01


