Gabriela Alves

PERNAMBUCO FEDERAL UNIVERSITY · COMPUTER ENGINEERING · gar@cin.ufpe.br

Experience

AUTECLA

CO-FOUNDER | DEVELOPER

• A system based on the PECS treatment, aims to facilitate the treatment and assistance to the autistic children, who suffer from delayed speech and language skills. In order to also promote the contact between the multidisciplinary team, parents and caregivers.

• Using Arduino, Galileo Gen 2, C and Python for embedded systems control of the system, Azure for the server and Django Framework for the Web App.

• Developing prototype to test with 10 children of FAV (Altino Ventura Foundation).

• First Place Award out of 16 projects on Intel Embedded System Competition 2016 - Local Competition.

• Best Engineering Team with Female Majority Award out of 60 projects on Intel Embedded System Competition 2016 - National Competition.

Apr 2016 - Present

UFPE

TEACHING ASSISTANT | HARDWARE INFRASTRUCTURE

• Teach practical classes about Assembly MIPS and Verilog.

• Assist students on the design, implementation and verification of a multi-cycle processor based on the Mips architecture. Aug 2017 – Present

Aug 2017 - Present

C.E.S.A.R.

SUMMER INTERN

• Under N.D.A.

• 60 out of 1050 applicants chosen to enroll CESAR Summer Internship.

• Conducted a learning management system with Virtual Reality training sessions, in order to make shop floor operators training more efficient.

Jan 2018 – Feb 2018

IMACA

CO-FOUNDER | DEVELOPER

• A system that enables a stretcher to collect the patient’s vital signs in real-time, sending important data directly to the hospital.

• Using a cluster of sensors to collect the patient’s vital signs, Arduino, Raspberry Pi 3, C and Python for embedded systems control, revised trauma score algorithm, Bootstrap and Firebase for the web interface and server.

• Best Engineering Team with Female Majority Award out of 25 projects on Embedded Systems Competition 2017 - WND IoT Challenge.

• Selected for the Mind The Bizz, a mentoring program for startups and innovation ideas by Porto Digital. Receiving mentorship and attending classes about Business, Product Development, Market Analysis, Design Thinking, Lean Startup, Scrum and Group Management.

Fev 2017 – Dez 2017

CETENE

EMBEDDED SYSTEMS TRAINEE

• Design, implementation and verification of an image processing algorithm for FPGA DE2i-120 using SystemVerilog. In order to optimize in over 400 times the execution, comparing to the implementation in C++.

Jan 2016 – Feb 2016

UFPE

EMBEDDED SYSTEMS TRAINEE

• Training in Design of Digital Systems. The training focused on learning to design, validate and test embedded systems with SystemVerilog.

Fev 2015 – Jan 2016

Education

UFPE - PERNAMBUCO FEDERAL UNIVERSITY

BEng in Computer Engineering
Apr 2014 - Dec 2019

Skills

Programming Languages & Tools
Over 4 years:
C • Verilog • SystemVerilog • Python

Over 2 years:
C++ • Assembly (MIPS and x86) • CSS • PHP • HTML

Familiar:
Haskell • Java • SQL • C#

Languages
Portuguese (Native)

English (Intermediate)

Awards & Certifications

  • 1st Place Award on Intel Embedded Systems Competition 2016 - Local Competition.
  • Best Engineering Team with Female Majority on Intel Embedded Systems Competition 2016 - National Competition.
  • Best Engineering Team with Female Majority on Embedded Systems Competition 2017 - WND IoT Challenge - National Competition.